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Authors will receive one hard copy of full paper, individual print certificates and digital certificates, Submit Manuscript

CALL FOR PAPERS : DEC-2018

Submission Last Date :  30-Dec-2018
Acceptance Notification :  in 15 days
Publication Date :  in 5 days
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Call for Paper Vol-7 Iss-02 Feb-2018

IJRET invites papers from various engineering disciplines for Volume-07 Issue-02, Feb-2018.

Submit Manuscript

Published Vol-07 Iss-01 Jan-18

IJRET Volume-07 Issue-01, Jan-2018 is published now.

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S.No. TITLE & AUTHORS PAGE
1COMPARISON OF PARALLEL SUMMATION AND WEAK INVERSION BASED LOGARITHMIC AMPLIFIER
Amrutha Paul, N.Kayalvizhi

https://doi.org/10.15623/ijret.2014.0324001		1-5
2A FUZZY LOGIC CONTROLLED DC-DC CONVERTER FOR AN ELECTROLYZER APPLICATION WITH A VOLTAGE DOUBLER
K.Shanthi, U. Rajesh, A. Mallikarjuna Prasad

https://doi.org/10.15623/ijret.2014.0324002		6-12
3AN ANALYSIS OF PFC CONVERTER WITH HIGH-SPEED DYNAMIC RESPONSE
R Satish Kumar, D Lenine, Ch Sai Babu

https://doi.org/10.15623/ijret.2014.0324003		13-17
4ANALYSIS OF DC CAPACITOR VOLTAGE BALANCE METHOD FOR H-BRIDGE INVERTER BASED POWER LINE CONDITIONER
R.Sheba Rani, C.Srinivasa Rao, M.Vijaya Kumar

https://doi.org/10.15623/ijret.2014.0324004		18-23
5HARMONIC REDUCTION OF CASCADED MLI FED INDUCTION MOTOR DRIVE USING MODIFIED MODULATION STRATEGIES
V. Naga Bhaskar Reddy, Ch. Sai Babu, J. Venkata Ramanaiah

https://doi.org/10.15623/ijret.2014.0324005		24-29
6ANALYTICAL REVIEW OF LOSS REDUCTION TECHNIQUES IN INDIAN POWER DISTRIBUTION SECTOR – TECHNO MANAGERIAL APPROACH
Isaac Ramalla, Nithin Namburi

https://doi.org/10.15623/ijret.2014.0324006		30-34
7THERMOELECTRIC POWER GENERATOR INTEGRATED COOKSTOVE: A SUSTAINABLE APPROACH OF WASTE HEAT TO ENERGY CONVERSION
Risha Mal, Rajendra Prasad, Virendra Kumar Vijay, Amit RanjanVerma, Ratnesh Tiwari

https://doi.org/10.15623/ijret.2014.0324007		35-39
8GSM BASED AUTOMATIC LPG ORDERING SYSTEM WITH LEAKAGE ALERT
Abid Khan, Neju K. Prince, Shailendra Kumar Dewangan, Praveen Singh Rathore

https://doi.org/10.15623/ijret.2014.0324008		40-42
9A SIMPLIFIED DESIGN OF MULTIPLIER FOR MULTI LAYER FEED FORWARD HARDWARE NEURAL NETWORKS
V.Parthasarathy, B.C.Hemapriya, H.M.Ravikumar

https://doi.org/10.15623/ijret.2014.0324009		43-47
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